Addressing Mode
A memory word is a group of 1’s and 0’s and may represent a number , an instruction code, one or more alphanumeric character or any other binary coded information. The internal instruction of a memory unit is specify by the number of words it contains and the number of bits each in each codes. Special input lines called address line select one particular words and each word in memory is assigned by an identification number called an address. It starts from 0 up to 2k -1 where k is the number of address line. The selection of specific words inside the memory is done by applying k bit binary address to the address line. A decoder inside the memory accepts this address and opens the path needed to select the bit of specific words.
Pointer used in C.A.
Pointers are the process of the reserving the location and transferring the address of upper hand to the location memory. It can be assigned by PTR (pointer).
The address of the current upper hand is stored in location PTR. When this location is addressed in the, the computer text they contain of PTR to be address of upper hand. As a result the upper hand in location PTR is assigned to the accumulator. Location PTR is then incremented with the instruction in line so its value changes to the value of address of the next sequential upper hand. The pointer points to the address of the current upper hand and the program loop is executed.
In computer with more than one processor register, it is possible to use one processor register as a pointer and that register of pointer is called index register.
Ex.HEX 0 the location for pointer.Instruction set design/issue where designing the instruction
It is a complex job because it affects so many aspects of computer system. The instruction set define many of the function perform be the CPU. And therefore has a significant effect on implementation of CPU. Since instruction sets are the means by which a program can control the CPU therefore programmers set the word instruction of instruction set design. Some of the important design issues related to instruction design are
· Operation
How many and which operation can be performed by the system and how complex operation can be performed are define be operation while designing instruction set.
· Data types
Various types of data for which operation are performed while designing the instruction set. Examples of data types are number, character and logical data.
· Instruction format
This includes instruction size in bits (that means number of bit used by instructions), number of address and size of various fields.
· Register
Number of CPU register that can be referenced by instruction and there used while designing the instruction set.
· Addressing mode
The mode by which the address of upper hand is specify and most specify which modes can be used while designing the instruction set.
Array, Array operation and array processor
Many scientific problems require arithmetic operation on large array of n numbers. These numbers are formulated as vectors and matrix of floating point numbers. A array is an orders set of one dimensional data items. A array “A” of length ‘n’ represented as a row by A=[a]. it may be represented as a column if the data items are listed in column form. Consequently, operation on arrays must be broken down into single competition with sub scripted variables. The element A1 of array “A” is written as A1=A[i] and index ‘I’ refers to index register array and memory address a register where the number is stored.
An array processor is a processor that performs competition on large array of data. Two types of array processor can be used to compute large array of data.
· Attached array processor
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Memory to memory data-bus
Fig: attached array processor with host computer
An attached array processor is an auxiliary processor attached to general purpose computer. It is intended to improve the performance of the host computer in specific numerical computation task. It’s purpose is to enhance the performance of the computer by providing array processing for complex scientific problems. The array processor can be program by the user o accommodate a variety of complex arithmetic application.
Above figure shows the interconnection of attached array processor to host computer. The host computer is general purpose computer and the attached processor is back end driven by the host computer. The input output controller act as a controller device to interface between host and attached array processor. The data for the attached array [processor are transformed from main memory to local memory through high speed memory to memory data bus.
· Single Interface Multiple Data(SIMD)
Fig: SIMD Architecture
SIMD array processor is a processor that has a single instruction multiple data organization. It many palates array instruction by means of multiple functional unit responding to a common single instruction. It has a single instruction having multiple functional unit operating in parallel and the processing unit are synchronized to perform the same operation under the control unit thus providing the SIMD organization. Above figure shows the organization of SIMD containing processing elements ‘P’, each having a local memory ‘m’, master control unit and main memory. Each ‘pe’ elements include ALU control unit floating point arithmetic unit and working register. The master control unit controls the operation in the processor elements and the main memory used for storage of the program. The function of the master control unit is to de-code the instruction and determines how the instruction is to be executed.
